We are looking for engineers who work together with us to making the future. MegaChips prepares the field you can play.

Job category Design Engineer --- (Digital) for SERDES
Job Description

Work with Analog Designer and Product Designer in developing and maintaining top level as well as various Digital sub Blocks and algorithms of SERDES being developed for various standards. Expected to take up final responsibility of SERDES PHY delivery to product team.

  • - Engineer is expected to design, simulate, synthesize and do timing sign off of various digital sub blocks of SERDES, including CDR, Filters, equaliser, etc.
  • - Develop behavioural model of complete SERDES and functional check.
  • - Maintain existing design and support.
  • - Prepare chip top RTL for test chip and drive test team during silicon evaluation.
  • - May need to help in automation of evaluation process in lab using FPGA based system.

  • - Should have hands on design experience of working with high speed SERDES Macros.
  • - Good understanding and experience of filter design, CDR, etc.
  • - Should be very proficient in RTL design, gate simulation, STA, etc.
  • - Desirable to have experience in silicon debug at chip level or system level.
  • - Expected to possess basic knowledge of ASIC design flow.
  • - Ready to act as one man team and eagerness to learn and contribute to new designs/products.
  • - Should possess very good communication skills and strive for common goal of the team.
  • - Highly self-motivated and possess capability to interact with cross domain, cross geography teams.
Education BE or ME/M.Tech or MS from reputed university.
Experience Level 5 to 7 years
Work location Bangalore (MegaChips Corporation India Branch)
Contact e-mail

Job category Analog/IO Circuit Designer for High Speed Clocking Products
Job Description

  • - Circuit Design, simulation, qualification and ownership of High Speed Mixed Signal Circuit used in various clock macros/SERDES.
  • - Understand various serial interface standards used in video data transfer like DisplayPort, miniLVDS, USB, mipi, etc and prepare design and qualification specifications for physical interfaces.
  • - Interact with cross domain and cross geography teams for common goal of the product under development.
  • - Involve in product debug and failure analysis if needed and support various teams across the company.

  • Clock:
  • - Hands on experience in designing product worthy PLL, CDR, DLL, Serialiser/deserialiser, etc. in multiple CMOS technologies. Should have exposure to complete development cycle including silicon qualification of the design.
  • - Propose and implement innovative and highly challenging circuits to meet power and speed constraints

  • Interface:
  • - Hands on experience in designing interface circuits like CML, LVDS buffers with competitive equalisation technique, like CTLE, DFE, etc.
  • - Desirable to have knowledge of interface standards like DisplayPort, mipi, USB, PCI Express, etc.
  • - Good understanding of packaging techniques, ESD issues etc. is highly desirable.

  • In both the above fields, good working knowledge of Cadence Analog Design tool suites, circuit simulators, MatLab, etc. Highly desirable to have silicon bring up experience and debug the design using corresponding lab equipment. Should possess very good communication skills and strive for common goal of the team. Desirable to have a few patents/publications to his/her credit.

Education ME/M.Tech or MS from reputed universities.
Experience Level 5 to 10 years
Work location Bangalore (MegaChips Corporation India Branch)
Contact e-mail

Job category Layout Engineer --- Analog
Job Description

  • - Floor plan and layout of high speed Analog blocks like PGA, PLL, SERDES, etc.
  • - Ensure quality of layout without much/any guidance.
  • - Prepare document of layout and present layout quality to the reviewer
  • - Interact with circuit designer for overall product improvement
  • - P & R of small blocks, if needed
  • - Interact with chip top team
  • - Responsible for delivery of macro and meet and improve quality of deliverable consistently.
  • - Contribute productivity improvement/automation activities
  • - Participate in layout reviews across various teams

  • - Good Understanding of CMOS device and fabrication process.
  • - Should have hands on working knowledge of latest CMOS process like 40nm, 28nm, etc.
  • - Should have hands on experience in layout of high speed analog blocks including ADC/DAC/PGA/PLL.
  • - Experience with industry standard layout and verification tools
  • - Good understanding of ESD, ASIC Flow, Packaging etc.
  • - Good communication skills and product development mindset
  • - Desirable to have experience in P & R flow (for mixed signal tool)
  • - Experience with SKILL coding and perl scripting is an added advantage.
Education BE/BTech
Experience Level 6 to 10 years
Work location Bangalore (MegaChips Corporation India Branch)
Contact e-mail

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